Instituto de Micro y Nanoelectrónica (IMNE)

College of Sciences and Engineering
About us

This institute conducts research in relation to solid state physics for the development of Nanoelectronics technologies (devices). Nanoelectronic devices aim to develop microelectronic systems (integrated circuits) for applications of logic (microprocessors), memory (RAM, DRAM, ReRAM), telecommunications systems, detectors and sensors, and photovoltaic cells. Applications are also made in relation to Integrated Circuit Programming (FPGA) and ASIC (Application-Specific Integrated Circuit) design for analog electronics. The research axes focus on Nanotechnologies and more specifically we can detail them below:

a. Area 1. Solid state physics:

  • Semiconductor physics and related materials.
  • Physics of electron and photon devices.


b. Area 2. Measurement and extraction technique

  • Parameter extraction and measurement techniques for nanoelectronic devices in relation to:
  1. The reliability.
  2. The transport of electrons and holes in solids.
  3. The variability of physical and electrical parameters in the manufacturing process.
  • Test evaluation techniques of microelectronic systems
  • Measurement in cryogenic environment and high temperature (up to 600K)

c. Area 3: Modeling complex systems

  • ReRAM cell modeling
  • Transport modeling in CMOS devices of SOI, TFET and FinFET type
  • Variability modeling due to manufacturing process
  • Modeling the effects of defects at the material level down to the system level

d. Area 4: Design and programming of integrated circuits

  • Analog Circuit Design (ASIC Type)
  • Integrated circuit programming (FPGA type)
  • Chip design
Research Interests

a.Basic
This part is related to the physics of nanometric devices. Basic research involves solid state physics in 3 specific areas: quantum physics, statistical physics, and electromagnetism. This also includes modeling of physical systems.

b. Applied
This research is related to the measurement and extraction aspect of parameters to form compact models that are used to predict the behavior of electron or photon devices. Here a well-defined device can be obtained from these results.

c. Experimental Development
In this part, the results of applied research will be used to design microelectronic systems such as an integrated circuit. This part focuses more on the development aspect of the system or the final product.

Academic staff
Mission

In Ecuador, we suffer from a significant lack of resources in hardware development. This causes a significant delay in various areas of industry, telecommunications, education, etc. The idea of ​​this institute is to investigate the technologies from the point of view of fundamental physics and promote them to achieve that Ecuador enters the world market of micro and nanoelectronics. IMNE will train high-quality, high-performance professionals in the field of cutting-edge research. The level of knowledge production will be evidenced in publications of high international impact and international patents. Finally, this institute will be the first in Ecuador in this important area of ​​development and will have important international agreements. Assist in the performance of PhD-type doctorates in collaboration with a foreign country. Offer a researcher position for graduate students (Master's and PhD.)

Vision

Promote the training in nanotechnologies of Ecuadorian professionals, introduce new scientific and technological disciplines related to applied physics to develop a new economy around Micro and Nanoelectronics in Ecuador. Link Ecuador with countries at the international level through projects on micro and Nanoelectronics in order to create a technology transfer consortium.

Descripción

Los ejes de investigaciones enfocan en Nanotecnologías y más específicamente les podemos detallar debajo:

a. Área 1. Física del estado sólido:

  • Física de los semiconductores y materiales relacionados.
  • Física de los dispositivos de electrones y fotones.

b. Área 2. Técnica de medición y extracción

  • Técnicas de medición y de extracción de parámetros para dispositivos nanoelectrónicos en relación con:
    1. La fiabilidad.
    2. El transporte de electrones y huecos en los sólidos.
    3. La variabilidad de parámetros físicos y eléctricos en el proceso de fabricación.
  • Técnicas de evaluación de test de sistemas microelectrónicos
  • Medición en ambiente criogénico y alta temperatura (hasta 600K)

c. Área 3: Modelaje de sistemas complejos

  • Modelaje de celdas ReRAM
  • Modelaje del transporte en dispositivos CMOS de tipo SOI, TFET y FinFET
  • Modelaje de la variabilidad debido al proceso de fabricación
  • Modelaje del efectos de defectos al nivel de material hasta el nivel de sistema

d. Área 4: Diseño y programación de circuitos integrados

  • Diseño de circuitos analógicos (de tipo ASIC)
  • Programación de circuitos integrados (de tipo FPGA)
  • Diseño de chip

Faculty

Director

  • Lionel Trojman
  • Director
  • Institute of Micro and Nanoelectronics (IMNE)
    San Francisco de Quito University,  Cumbayá Campus.
    PO Box: 17-1200-841 Quito, Ecuador.
    Telephone: 0983508122
    Email:ltrojman@usfq.edu.ec

Administrative Faculty:

Name Contact
Luis-Miguel Prócel
Lab Director
lprocel@usfq.edu.ec
José Bustamante
Collaborator
jabustamante@usfq.edu.ec

Research

  • Study of intelligent visual recognition system using FPGA
  • Multidisciplinary project in functional nanostructured materials: manufacture of high-quality, multilayer thin films of oxides, metals and dielectrics, and study of their physical properties.
  • Second Stage in Research in Particle Physics with the CERN LHC CMS Experiment - Run 2 to 13 TeV.
  • Solid State Nanopore Fabrication via Dielectric Breakdown.
  • Integrated circuit design using CAD for industrial implementation.
  • Research in Particle Physics with the CERN LHC CMS Experiment - Run 2 to 13 TeV.
  • Study and design of nanoelectronic devices for power electronics.
  • Study of the electric field in the bodies of the 8nm FDSOI using a TCAD and experimental data.
  • Universal modeling of RERAM cells.
  • Channel Hot Carrier study.
  • Physical study of nanometric devices.
  • AC Performance Project of advanced CMOS devices.

Publications

  1. J. S. Romero, D. Verdier, L. M. Prócel and L. Trojman, Implementation and Optimization of the Algorithm of Automatic Color Enhancement in Digital Images, ROPEC, 2017, Ixtapa, Mexico (accepted).
  2. E. Garzon, F. Chávez, D. Jaramillo, L. Sánchez, S. Lara, C. Macías, L.-M. Procel, E. Sicard and L. Trojman, “Microprocessor Design with a Direct Bluetooth Connection in 45nm Technology Using Microwind”, IEEE Transaction on Latin America, September 2017 (In review).
  3. D. Benalcazar, E. Garzón and L. Trojman, “Capacitance Extraction of 34-nm Channel Length MOSFET for Parasitic Assessment Using the RFCV Technique” IEEE Transaction on Latin America, September 2017 (En revision).
  4.  S. Torres, T. Reytier and L. Trojman, “A comparative Study of DFT Methods to Semiconductor Materials”, IEEE Transaction on Latin America, Juin 2017 (En revision).
  5. J. Romero, D. Verdier, R. Pazmiño, L.-M. Procel et L. Trojman, “Implementing Optical Flow in Digital Images”, IEEE Sensor Journal, October 2017 (In review).
  6. L. Trojman, D. R. Benalcazar, G. Jobard and L. M. Prócel, “Mobility Extraction for 24-nm-channel Length n-MOS Using the RFCV Technique: Effect of the Fabrication Process”, ROPEC, 2017, Ixtapa, Mexico (accepted).
  7. S. Guitarra, L. Trojman, and L. Raymond, “Model for Resistive Switching in bipolar Hf-based Memories”, IUPAP International Conference on Women in Physics (ICWP), Birmingham, UK, 2017.
  8. E. Acurio, F. Crupi, P. Magnone, L. Trojman, F. Iucolano, “Impact of AlN layer sandwiched between the GaN and the Al2O3 layers on the performance and reliability of recessed AlGaN / GaN MOS-HEMTs”, Microelectronic Engineering Vol. 178, June 25, 2017, Pages 42-47.
  9. E. Acurio, F. Crupi, P. Magnone, L. Trojman, G. Meneghesso, F. Iucolano, “On recoverable behavior of PBTI in AlGaN / GaN MOS-HEMT”, Solid-State Electronics, Vol. 132, 1 June 2017, Pages 49-56.
  10. L. Trojman, S. Guitarra, L. M. Prócel, L. Raymond, Study of the scaling and the temperature for RERAM cells using the QPC model, IEEE Transaction on Latin America, Vol. 14, N. 12, Dec. 2016, pp. 4693 - 4698
  11. 11. LM Prócel, F. Crupi, L. Trojman, J. Franco, B. Kaczer, “A Defect-Centric Analysis of the Temperature Dependence of the Channel Hot Carrier Degradation in nMOSFETs”, IEEE, Transactions on Device and Materials Reliability, Vol. 16, n. 1, pp. 98 - 100 March 2016
  12. E. Garzón, F. Sanchez, L.-M. Prócel and L. Trojan, “Remote control of VNA and parameter analyzer for RFCV measurements using Python”, ANDESCON, 2016 IEEE Arequipa Peru 2016.
  13. L. Trojman, J. S. Acosta, M. Ortega, L.-M. Prócel, “Statistical study of SiON short MOSFET under Channel Hot Carrier stress”, ANDESCON, 2016 IEEE, Arequipa, Peru 2016.
  14. L.M. Prócel, L. Trojman and F. Crupi, “Temperature study of defect generation, under channel hot carrier stress for 35-nm gate length MOSFETs using the Defect-Centric perspective”, ANDESCON, 2016 IEEE, Arequipa Peru 2016.
  15. J. Franco; B. Kaczer, S. Mukhopadhyay, P. Duhan, P. Weckx, Ph. J. Roussel, T. Chiarella, L. -Å Ragnarsson, L. Trojman, N. Horiguchi, A. Spessot, D. Linten, A. Mocuta, “Statistical model of the NBTI-induced threshold voltage, subthreshold swing, and transconductance degradations in advanced p-FinFETs , 2016 IEEE International Electron Devices Meeting (IEDM), 15.3.1 - 15.3.4, CA (USA), 2016.
  16. L. Trojman, Study of Mobility for HfO2 dielectric FDSOI-UTTB pMOS under substrate biases, IEEE Transaction on Latin America, Vol. 14, N. 10, Oct. 2016, pp. 4235 – 4240
  17. E. Acurio, F. Crupi, P. Magnone, L. Trojman, F. Iucolano, “Impact of AlN layer sandwiched between the GaN and the Al2O3 layers on the performance and reliability of recessed AlGaN/GaN MOS-HEMTs”, 20th conference on Insulator Semiconductor Film On Semiconductor (INFOS), Udine (Italy) 2015.
  18. L.M. Prócel, F. Crupi, J. Franco, L. Trojman, B. Kaczer, N. Wils, H. Tuinhout, “A Defect-Centric Perspective on Channel Hot Carrier Variability in nMOSFETs”, 19th conference on Insulator Semiconductor Film On Semiconductor (INFOS), Udine (Italy) 2015.
  19. L.M. Prócel, F. Crupi, J. Franco, L. Trojman, B. Kaczer, N. Wils, H. Tuinhout, “A Defect-Centric Perspective on Channel Hot Carrier Variability in nMOSFETs”, Microelectronic Engineering, 2015
  20. B. Kaczer, J. Franco, M. Cho, T. Grasser, Ph. J. Roussel, S. Tyaginov, M. Bina, Y. Wimmer, L. M. Prócel, L. Trojman, F. Crupi, G. Pitner, V. Putcha, P. Weckx, E. Bury, Z. Ji, A. De Keersgieter, T. Chiarella, N. Horiguchi, G. Groeseneken, A. Thean, “Origins and Implications of Increased Channel Hot Carrier Variability in nFinFETs”, International Reliability Physic Symposium,CA, USA (IRPS) 2015.
  21. L.Trojman, L.-A Rgnarsson and N. Collaert, “Mobility improvement study for 8Å-EOT HfO2 UTBB-FD-SOI-MOSFET based on the direct extraction of the back channel mobility”, IEEE, Transaction on Electron Device, nov. 2014.
  22. S. Guitarra, L. Trojman, “Physical model to understand the behavior of ReRAM resistive random access memories ”, Congress of the Ecuadorian Physical Society, Quito, Ecuador,2014.
  23. L.M. Procel, F. Crupi,J. Franco, L. Trojman and B. Kaczer, “Defect-Centric Distribution of Channel Hot Carrier Degradation in Nano-MOSFETs”, IEEE Electron Device Letter, nov 2014
  24. F. Oviedo, L. Trojman, T. Kauerauf, E. Bonifaz, “Thermal –electrical Finite element analysis of Nanometric copper vias under high fluence stress”, Avances en Ciencias e Ingenierías, Diciembre 2013.
  25. F. Oviedo, L. Trojman, T. Kauerauf, E. Bonifaz, “Thermal –electrical Finite element analysis of Nanometric copper vias under high fluence stress”,

    Advances in Science and Engineering, December 2013.

  26. J. Fraga, L. M. Procel, L. Trojman, J. Torres, “A DFT Study of the components of Hf/HfO2/TiN three layer stack”, Avances en Ciencias e Ingenierías, Vol.5, n. 2, diciembre 2013.

  27. L. M. Procel, J. Moreno, F. Crupi, L. Trojman, “Mobility extraction in ultra-thin body buried oxide and fully depleted SOI MOSFET”

    Advances in Science and Engineering,,Vol. 5, n. 1, Junio 2013.

  28. L.M. Procel, L. Trojman, J. Moreno, F. Crupi, V. Maccaronio, R. Degraeve, L. Goux, E. Simoen, “Experimental evidence of the quantum point contact theory in the conduction mechanism of bipolar HfO2-based resistive random access memories”, Journal of Applied Physics, Vol. 114, n. 7, 2013.
  29. V. Maccaronio, F. Crupi, L.M. Prócel, L. Goux, E. Simoen, L. Trojman, E. Miranda, DC and low-frequency noise behavior of the conductive filament in bipolar HfO2-based resistive Random Access Memory”, Microelectronic Engineering, Volume 107, July 2013, Pages 1–5.
  30. J. Bustamante, L. Trojman, “Ultra-Thin Depleted Silicon on Insulator MOSFET: S simulation based on COMSOL Multiphysics”, Avances en Ciencias e Ingenierías, Vol. 4, n. 1, Julio 2012.
  31. L. Trojman, L. Pantisano, L.-A. Ragnarsson “High-Field Transport Investigation for 25-nm MOSFETs with 0.64-nm EOT: Intrinsic Performance and Parasitic Effects”, IEEE. Transaction on electron devices, Vol. 59, n. 7, Julio 2012
  32. L.-Å. Ragnarsson, J. Mitard, T. Kauerauf, A. De Keersgieter, T. Schram, E. Röhr, N. Collaert, M. Jurczak, S.-H. Hong, J. Tseng, W.-E. Wang, L. Trojman, K.K. Bourdelle, B.-Y. Nguyen, P. Absil and T. Y. Hoffmann,”On the Origin of Mobility Reduction in Bulk-Si, UTBOX-FDSOI and SiGe Devices with Ultrathin-EOT dielectric”, Symposium on Very-Large-Scale-Integration-Technology System and Application (VLSI-TSA), Tai-Peh, Taiwan, April 2011.
  33. L.-Å. Ragnarsson, J. Mitard, S.-H. Hong, S. Takeoka, J. Tseng, W. Wang, S. Yamaguchi, L. Trojman, T. Kauerauf, A. De Keersgieter, T. Schram, E. Röhr, N. Collaert, M. Jurczak, K. K. Bourdelle, B.-Y. Nguyen, P. Absil and T. Y. Hoffmann, “On the Origin of Mobility Reduction in Ultrathin EOT HK/MG CMOS devices: Impact from Gate-Stack and Device Architecture”, International Workshops on Dielectric Thin Film for Future Electron Device (IWDTF), Tokyo, Japan, January 2011.
  34. L. Trojman, et al., “Experimental Investigation of the Electronic Transport for Nanometric High-k/MG MOSFET and Performances”, 1ST International Nanotechnology congress, Ecuador June 2010.
  35. L. Trojman, J. Bustamante, L. Pantisano and S. Navarro, “

    Sub-nanometric EOT and mobility degradation: Towards a Physical Limitation of Modern Manufacturing Techniques? ”, Advances, Science and Engineering Section, Vol.2, n.2, June 2010.

    
     

 

 

 

 

 

 

 

 

Alliances

INP Toulouse-N7
Country: France
Type of collaboration: Research and teaching

UNICAL
Country: Italy
Type of collaboration: Research and teaching

Imec
Country: Belgium
Type of collaboration: Research

CERN
Country: Switzerland
Type of collaboration: Research and development

IN2MP
Country: France
Type of collaboration: Research

Events

Digital Integrated Circuit Design Workshop with TCAD Synopsys
Date: April

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